Microcomputers and
PLCs are sequential logic devices. In contrast to a
real-time hardware logic, which can perform many operations at the
same time, a PLC can perform only a single operation before
proceeding to the next logical step. The figure describes
the logical operation of a PLC, which is cyclic in nature.  During the I/O scan, the PLC looks at
the input data
available at the input terminals and activates the outputs based
on the ladder logic. During the processor scan, the new
input data is processed by the Central Process Unit (CPU)
according to the ladder program and the outputs are updated during
the next I/O scan. This cycle repeats again and again
The expression
"garbage in, garbage out" fits very well to the
PLC. If the input data is invalid or incorrect, the
corresponding machine operation also be incorrect.
Therefore, it is very important that when the PLC reads the
decoder input during the I/O scan, the decoder data is valid and
free of any ambiguities.
There are two main
inherent characteristics of electronic devices that could cause
wrong decoder data into the PLC:
a) PLC
Reading the Changing Bit Pattern:
As we all know, a BCD, binary, or gray code number is composed of
various bits that change state when decoder position passes from
one number to the next. Inherently, in Gray Code only 1 bit
changes state when changing from one number to the next, while in
BCD or Binary data more than on bit may change for each number
change. Let us consider the example of changing decoder
position from 199° to 200°.
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In a BCD
code, for this 1° change of position, 6 bits will change state,
i.e., 100, 80, 10, 8, and 1 bit will go LOW and 200 bit will go
HIGH. And, due to the reaction time of electronic
components, all these bits do not change state at the same
time. At a given time when PLC reads the data, some bits
might have gone LOW while others may still be HIGH.
Therefore, while reading the above changing bit pattern the PLC is
liable to read a wrong number.
b) Reaction Time of PLC
Input Modules:
PLC I/O modules, even the TTL compatible ones, have lengthy and
inconsistent time delays when they change their logic state.
This inconsistency gets further compounded by long wiring runs
between the decoder and the PLC, and also the limited current
drive capability of the decoder outputs. In the above
example, when the input to the I/O module goes from 199° to
200°, the output may stay at 000 for a time, depending on the I/O
module reaction time.
An I/O scan during this time (2
to 10 ms in typical installations) will read false data to the
PLC. The solid line is the field side of the I/O module and
the dashed line the PLC side. During the switching time
(TS), the decoder information as seen on the PLC side is 0, which
is invalid.
Even dedicated microprocessor
controls with faster scan times are faced with the above two
problems, though to a lesser degree. In microprocessors the
TS is in microseconds instead of milliseconds and software can be
designed to ignore inconsistent data. If your microprocessor
does not have this software provision or in you are using a PLC,
the hardware synchronization described below must be used to
assure the integrity of the incoming decoder data.
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